Reportingly: Huawei developed domestic chip design tools to self-sufficient

The volunteer at the Chinese tech giant is channelizing the fact that the company developed its own chip design tools oriented toward side-stepping U.S. sanctions and making the company more self-sufficient in the semiconductor space.

Huawei developed domestic chip design tools

Rotating chairman at Huawei, Eric Xu said the company along with other domestic firms, jointly created electronic chip design tools required to make semiconductors at 14 nanometers and above, according to a speech obtained by Chinese financial and business publication Yicai.

He also added that “tools will be verified this year, which would allow them to be put into use.” Stepping towards self-sufficiency instead of reliance on U.S. technology in semiconductors this gonna be great to know. Whereas U.S. firms dominate the chip design tool market with companies like Synopsys and Cadence Design Systems.

The 14-nanometer figure refers to the size

14-nanometer chips and above are being considered due to designing tools, said Xu. The nanometer figure refers to the size of each individual transistor on a chip. Typically, a reduction in nanometer size can yield more powerful and efficient chips.

However, 14-nanometer chips are several generations behind what is currently being put into the latest smartphone technology. For example, Apple’s iPhone 14 Pro Max uses a 5-nanometer chip. However, 14-nanometer chips may be used in some of the company’s other products.

In the source, a chairperson of the high-tech geopolitics program at the Takshashila Institution, Pranay Kotasthane would wait to see more details before knowing how effective Huawei’s design tools are.

He clears that contract chip manufacturing firms, also known as foundries, work with semiconductor design companies to come up with a set of files called a Process Design Kit.

“This PDK models the physical and electrical characteristics” of the basic components of a chip. The design firm and manufacturer need to go through a process to optimize production to ensure the highest yield of semiconductors. If this process does not happen, then “chip designs will fail when converted into silicon,” Kotasthane said.

Kotasthane is convinced “There’s not enough proof yet to suggest that Chinese EDA [electronic design automation] companies have crossed this barrier.”

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